Aborting execution of instructions.


Data processing apparatus with means for preventing complete execution of a current instruction if either a memory access initiated by the preceding instruction is invalid or a condition test means detects that the current instruction should not be executed due to the condition of certain flags specified as part of the instruction. <IMAGE>




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Patent Citations (1)

    Publication numberPublication dateAssigneeTitle
    GB-1480209-AJuly 20, 1977Data Loop LtdDigital computers

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Cited By (3)

    Publication numberPublication dateAssigneeTitle
    GB-2315890-AFebruary 11, 1998Mitsubishi Electric CorpMicroprocessor having conditional-execution instructions
    GB-2315890-BSeptember 22, 1999Mitsubishi Electric CorpMicroprocessor having conditional execution instructions
    US-5996070-ANovember 30, 1999Mitsubishi Denki Kabushiki KaishaMicroprocessor capable of executing condition execution instructions using encoded condition execution field in the instructions